Exam 3 Practice Questions
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1) Assume ebx holds the address of array 'short A[7]'. Further,
suppose subscript 'i' is held in register edx. Write one statement to
load the value of A[i], another to double it, and a final one to store
the value back to A[i].

2) Declare a structure 'S' holding a short, double, and int, in that
order. What is the size of the struct and what is the offset of each
field? Assume we're dealing with x86-64, so if an element is 'k' bytes
then it must be aligned on a 'k' byte boundary.

3) What are the differences between nested and jagged arrays? How is
the address of A[i][j] computed for both? What kind of bounds checking
does C and C++ do?

4) How does a union differ from a struct? How can a union be used to
access the bits of a double as a integral type, without
the processor changing the bits?

5) What are the four regions of memory? Depict them with a diagram,
clearly showing low vs high memory. What type of object goes in each?
When you use operator 'new' in C++ which region is used? If you
declare "int A[1'000];" in a function where will the storage be
allocated?

6) What's the range of an unsigned w-bit integer? How about a signed
w-bit integer?

7) Know the main CPU performance equation (T = IC * CPI * tau), and be
able to apply it.

8) How can buffer overflows be prevented? How does a system help
prevent them from being exploited? What is return-oriented programming?

9) Why is pipelining useful? What are some of the issues that arise?
Be able to calculate instruction latency and throughput.

10) Construct a circuit that returns 1 if exactly two of three bits
are set, and 0 otherwise. Use sum of products form.

11) Implement a four-input NAND gate using CMOS transistors. Use the
text format described in the Notes directory.

12) Explain how we can implement 3-bit subtraction using a 1-bit full
adder.

13) Show the micro-operations that occur in EACH of the six stages for
ANY Y86 instruction.

14) What are the differences between sequential and combinational
logic? How does a SR latch, D latch, and D flip-flop differ? 

15) What's the purpose of a MUX and decoder? 

16) Write the control logic for "need_valC" in HCL. Look up the
relevant signals. Do the same for "dstM".