Title  : Performance Assignment
Class  : CSCI 370.---
Name(s):  

******************************************************************************

Consider three different processors P1, P2, and P3 executing the same
instruction set with the clock rates and CPIs given below.

Processor    Clock Rate      CPI
P1	     2.0 GHz         1.5
P2	     1.5 GHz	     1.0
P3	     3.0 GHz	     2.5

1.1) Which processor has the highest performance in instructions per
second (I/s)? Hint: You can solve the main performance equation for IC
/ T to get the required units.




1.2) If the processors each execute a program in 10 seconds, find the
number of cycles and the number of instructions for each processor. 




1.3) We are trying to reduce the time (from 10 s in Problem 1.2) by
30% but this leads to an increase of 20% in the CPI. What clock rate
should we have to get this time reduction for each processor?




For the problems below, use the information in the following table.

Processor    Clock Rate    No. Instructions    Time
P1	     2.0 GHz	   20e9		       7  s
P2	     1.5 GHz	   30e9		       10 s
P3	     3.0 GHz	   90e9		       9  s

1.4) Find the IPC for each processor.




1.5) Find the clock rate for P2 that reduces its execution time to
that of P1.




1.6) Find the number of instructions for P2 that reduces it execution
time to that of P3.




******************************************************************************

Consider two different implementations (P1 and P2) of the same
ISA. There are four classes of instructions: A, B, C, and D. The clock
rate and CPI of each implementation are given in the following table.

      Clock Rate | CPI Class A | CPI Class B | CPI Class C | CPI Class D
P1    1.5 GHz      1             2             3             4
P2    2.0 GHz      2     	 2	       2 	     2

2.1) Suppose we have a program with 10^6 instructions divided into
classes as follows: 10% class A, 20% class B, 50% class C, and 20%
class D. Which implementation is faster?




2.2) What is the average CPI for each implementation?




2.3) Find the clock cycles required in both cases.




The following table shows the number of instructions for a program.

Arith    Store    Load    Branch   Total
500	 50	  100	  50	   700

2.4) Assuming that Arith instructions take 1 cycle, Load and Store 5
cyles, and Branch 2 cycles, what is the execution time of the program
on a 2 GHz processor?




2.5) Find the CPI for the program.




2.6) If the number of load instructions can be reduced by one-half,
what is the speed-up and the CPI?




******************************************************************************

Suppose we have developed new versions of a processor with the
following characteristics.

Version    Voltage    Clock Rate
A	   5.0 V      0.5 GHz
B	   3.3 V      1.0 GHz

3.1) Determine the ratio of capacative loads (L_B / L_A) if the power
has been reduced by 10%?




3.2) By what factor has the power been reduced if the capacitive load
does not change? (Determine the ratio P_B / P_A.)



3.3) Assuming that the capacitive load of B is 80% the load of A,
find the voltage for B if the power of B is 60% that of A.




Supposing the industry trends show that a new process generation
scales as below.

Capacitive Load    Voltage    Clock Rate    Area
1	   	   2^(1/4)    2^(1/2)	    2^(-1/2)

3.4) By what factor does the power scale?




******************************************************************************